Electrostatic discharge (ESD) events can cause damage to elements of circuitry due to excessively high voltages or currents. For example, the propagation of an ESD event through a circuit may cause a transistor to greatly exceed its voltage or current capacity, suffer physical damage, and subsequently fail. The potential for failure increases as circuitry becomes smaller and as operating voltage levels are reduced. ESD events may occur due to a relatively short period of relatively high voltage or current imposed on a device. For example, ESD events are sometimes caused by contact with the human body, by machinery such as manufacturing or test equipment, or in electrically active environments, as may be incurred in many consumer applications. A variety of ESD events can occur in electronic devices, including discharge between the pads of an integrated circuit, discharge between voltage supply terminals, and discharge between pads and voltage supply terminals. Various kinds of ESD protection circuitry are used in the art to protect ICs from the damage due to the occurrence of ESD events during manufacture, testing, and operation. In general, ESD protection circuitry is designed to protect the input/output circuitry and internal circuitry of an integrated circuit from excessively large and sudden discharges of electrostatic energy.
One known approach is to provide ESD protection external to the microelectronic circuit. Among other problems, this approach can adversely affect the load capacitance, resistance, speed, linearity, frequency response, stability, or slew rate of the circuitry. Another potential solution is to make the circuitry better able to withstand higher voltages Of ESD event. This solution can also adversely affect the performance of the circuit, and is unacceptable for many applications. External ESD protection circuitry can also be placed within the functional circuit path. In many applications, however, extra loading and capacitance is unacceptable. Additional challenges to providing ESD protection in IC devices lie in the ever-present desire to reduce die area, and to reduce current leakage.
Due to these and other problems, a need exists for circuits and methods that provide microelectronic circuits with the ability to withstand ESD events without adversely impacting the performance of the functional circuit path during normal operation.